The baseband processor uses the Xilinx Zynq 7020 SoC to deliver FPGA accelerated computations combined with stand-alone operation enabled by a dual-core ARM CPU. The USRP E312 includes a rich set of peripherals such as an integrated GPS receiver for position awareness and time synchronization, as well as two host USB ports for extending storage, I/O, and communication options with off-the-shelf devices. Users can rapidly prototype and deploy designs for mobile and embedded applications with tight size, weight, and power requirements.

The USRP Embedded Series platform uses the OpenEmbedded framework to create custom Linux distributions tailored to application specific needs. The default operating system is pre-installed with the UHD software API and a variety of third party development tools such as GNU Radio. Support for the RFNoC FPGA development framework enables deterministic computations for real-time and wideband signal processing.

Table 1: Operating system and development frameworks

Filter Banks

The USRP E312 contains both RX and TX filter banks. Filters are dynamically chosen based on user frequency selection. The RX filters reduce interference from out-of-band signals, while the TX filters suppress harmonics.

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